• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    A homodyne wireless receiving apparatus is provided for mitigating fixed or variable DC offsets caused by residual secondary intermodulation terms due to an unwanted signal. The homodyne radio receiver includes an antenna (1), an antenna bypass filter (2), and an R.F. An amplifier 4 and a quadrature downconverter 5. The complex baseband quadrature downconverter 5 is centered around the desired receive frequency, so that the complex baseband signals lie around zero frequency. A secondary total power detector 6 is provided to measure the total received power through the antenna bypass filter so that unwanted terms caused by the second order intermodulation are compensated. This compensation is achieved by supplying instantaneous power measurements with the complex baseband signal to the signal processing unit 20. The signal processing unit 20 determines the complex compensation coefficient by correlating the power signal with the complex baseband signal. The complex compensation coefficient is then employed to subtract the weight of the power signal from the complex baseband signal to remove unwanted second order intermodulation distortion terms.
    公开号:KR20000067889A
    申请号:KR1019997000335
    申请日:1997-07-11
    公开日:2000-11-25
    发明作者:덴트，포올，더블유.
    申请人:도날드 디. 먼둘；에릭슨 인크.；
    IPC主号:
    专利说明:

    Secondary intermodulation compensation for homodyne receivers {COMPENSATION FOR SECOND ORDER INTERMODULATION IN A HOMODYNE RECEIVER}
    The present invention relates to homodyne wireless receivers, and more particularly to an apparatus for compensating for unwanted signals due to secondary intermodulation terms.
    Homodyne receivers are commonly known as variations of superheterodyne receivers. In general, a superheterodyne receiver receives signals in a first frequency band, mixes the received signals with locally generated oscillator signals, and converts them into a second or intermediate frequency band. By selecting the local oscillator signal to be a certain amount away from the selected desired signal in the first frequency band, the selected desired signal always appears at the same frequency in the intermediate frequency band. In this way, the selection of the desired desired signal can be facilitated by a fixedly tuned intermediate frequency filter.
    In the homodyne receiver, a variant of the superheterodyne receiver, the selected intermediate frequency band is DC or zero frequency. Thus, the local oscillator has zero frequency separation from the selected desired signal. Any modulation to the selected desired signal causing spectral components above and below the nominal signal frequency is superimposed at the mixer output, which is intermediate above the nominal frequency where the dF component below the signal frequency or the dF component above the signal frequency is zero. Because it will appear at the frequency dF. To allow for the resolution of these nested components, two mixers are provided in the homodyne receiver using local oscillator signals with a phase offset of 90 degrees. The components above and below the nominal signal frequency then appear as I = A + B at one mixer output and Q = j (A-B) at another mixer output, if desired, they are B = (I + jQ) / 2 or A Can be separated by forming = (I-jQ) / 2.
    The operation of this homodyne receiver is described in more detail in US Pat. No. 5,241,702, which is incorporated herein by reference. A problem with the operation of known homodyne receivers is that the local oscillator frequency is equal to the desired reception frequency, which allows the homodyne receiver to receive interference components due to radiation from its local oscillator. When the local oscillator frequency is exactly at the nominal expected frequency, this interference component is converted to exactly zero frequency or DC at the mixer output and a large DC offset component is generated, which is many times larger than the desired signal. . However, this interference component can be eliminated by applying techniques including differentiating, digitizing, and then numerically re-integrating complex baseband signals output from quadrature mixers.
    As a result, a problem with homodyne receivers in which total power, which may include not only the desired signal but also many unwanted signals, flows through the antenna bandpass filter is a problem. It has typically been rectified by the square-law distortion term in amplifiers or quadrature down converters, but this results in adding a crashing term to the complex baseband signal. This type of impurity is most pronounced when the interfering signals are amplitude modulated or a burst type such as a TDMA transmission.
    If other strong interfering signals are present at any frequency at the input of the quadrature down converter, they are converted to DC by mixing these signals themselves through any even order distortion term in the polynomial of the mixer's transfer function. Can be. The effect is a push-pull R.F., which eliminates balanced mixer structures and even-order distortion. This can be minimized by choosing an amplifier structure, the most important of which is the square law term, which is known as quadratic intermodulation or IP2. Nevertheless, due to residual IP2 terms from incomplete balance within the balanced structure, signals of sufficient magnitude may still result in fixed or variable DC offsets.
    The present invention relates to a homodyne radio receiver for mitigating fixed or variable DC offsets caused by residual IP2 terms in the operation of a known homodyne receiver.
    <Summary of invention>
    These and other objects are described in accordance with the present invention in antennas, antenna bandpass filters, R.F. Achieved by a homodyne wireless receiver comprising an amplifier and a quadrature down converter to the complex baseband. In a preferred embodiment of the present invention, the local oscillator for the down converter is centered at the desired receive frequency so that the complex baseband signal lies around zero frequency.
    The device compensates for unwanted terms caused by second order intermodulation (IP2) by having a secondary total power detector that measures the total received power through the antenna band pass filter. The instantaneous power measurement is fed to the signal processor along with the complex baseband signal, the complex compensation coefficient being determined by correlating the power signal with the complex baseband signal. This coefficient is then employed to subtract the weight of the power signal from the complex baseband signals to remove the unwanted IP2 distortion term. By this, the present invention eliminates the effect of IP2 interference in the homodyne radio receiver.
    1 is a block diagram of an apparatus for removing secondary intermodulation in accordance with a first embodiment of the present invention;
    2 is a block diagram of an apparatus according to a second embodiment of the present invention.
    3 is a block diagram of an apparatus according to a third embodiment of the present invention.
    Embodiments of the present invention implement an apparatus and method for removing unwanted IP2 distortion terms in a homodyne wireless receiving device. One embodiment of the present invention for an apparatus for canceling the effect of IP2 interference is shown in an alternative form in FIG. 1.
    In the embodiment shown in FIG. 1, the signals are applied to the apparatus and the signal in the bandwidth determined by the antenna bandpass filter 2 is received by the antenna 1. In one embodiment of the invention, a portion of the composite signal passed by the antenna bandpass filter 2 is supplied by the directional coupler 3 to the power detector 6 while the Mostly RF It is applied to the amplifier 4 and the quadrature down converter 5. Part of the mixed signal passed by the antenna bandpass filter 2 may be applied to the power detector 6 by, for example, a signal pickoff unit. The total power measurement signal waveform P (t) can be generated using a square-law device for a power detector such as, for example, a Gilbert multiplier cell, which is suitable for integration into silicon integrated circuits. In another example, a linear detector can be used as the power detector 6 to generate a total power measurement signal waveform P (t). The weights of the power measurement signal waveform P (t) are formed using weighting units 7, 8 that respond to input weighting coefficients "a" and "b" respectively. The weighting coefficients (a, b) are fixed once overall, which means that they are R.F. This is because it is correlated to the IP2 characteristics of the amplifier 4 and the quadrature down converter 5. On the other hand, the IP2 characteristic is likely to change from the weighting unit due to processing and according to its operating temperature. As a result, the weighting factors a, b are preferably determined by the signal processing unit 13 to be adaptable.
    The weights a (P (t) and bP (t) of the total power measurement signal waveform P (t) are subtracted from the output of the quadrature down converter 5 using the first and second subtractors 9, 10. To generate an IP2-compensated signal.
    Alternatively, the first and second subtractors 9, 10 can be implemented as adders if the sine of the weighting coefficients (a, b) is appropriately selected.
    In this embodiment, the IP2-compensated signals from the first and second subtractors 9 and 10 are then low-pass filtered in the first and second low pass filters 11 and 12 to the desired signal. Specifies the passband width for. The filtered compensated signals are then processed in signal processing unit 13 to generate a demodulated / decoded desired output signal 14.
    For example, the signal processing unit 13 may function in accordance with US Pat. No. 5,241,702, cited above, which may further include DC offset compensation, digitalization, and digital signal processing. In addition to the functions described in US Pat. No. 5,241,702, the signal processing unit 13 may combine new functions for adaptively adjusting the weighting factors (a, b) according to one embodiment of the present invention. have. The new function correlates the power measurement signal waveform P (t) with the compensated output signal from the first and second low pass filters 11, 12 to determine the accuracy of the compensation. Accurate compensation results in no correlation between the compensated signal and the power signal. Nonzero compensation indicates that the weighting factors (a, b) are errors and the amount of errors. The signal processing unit 13 then generates the adjusted weighting factors a, b which are fed back to the weighting units 7, 8 to generate the adjusted compensation.
    To perform this new function using digital signal processing, the power measurement signal P (t) is low pass using a third low pass filter 15 similar to the first and second low pass filters 11 and 12. Can be filtered and then converted from analog to digital by the signal processing unit 13. For example, high bitrate delta-sigma modulation can be used for such analog-to-digital conversion. Then internally reconstructed according to U. S. Patent No. 5,241, 702, then correlation is performed by multiplying the digitized power signal with each of the digitized signals from the first and second low pass filters 11, 12. Can be. The multiplied value is then time-averaged to determine if there is a net correlation between the power signal and the compensated signal. The signal processing unit 13 accordingly optimizes the output signal 14 by correlating the power signals P (t) with the compensated signals aP (t) and bP (t) to determine the remaining unremoved distortion component. Used for control If the total power signal P (t) is generated by a linear (amplitude) detector, then the linear value is of course squared by numerical processing in the signal processing unit 13 to generate a value relating to power, or alternatively IP2. Receive any order polynomial transformation suitable for optimizing me or higher order terms.
    The signal processing unit 13 also compensates for the DC offset present at the output of the down converter 5. The signal processing unit 13 differentiates and digitizes the compensated signals aP (t) and bP (t) and then performs numerical re-integration of the differentiated and digitized signals to perform DC offset compensation. The signal processing unit 13 further compensates for the DC offset by DC blocking and digitizing the compensated signals aP (t) and bP (t). By evaluating the errors in the desired components of the compensated signals aP (t) and bP (t) caused by DC blocking, the signal processing unit 13 can subtract this estimated error to compensate for the DC offset.
    In the embodiment shown in Fig. 1, certain elements may be connected in an alternative order without affecting the basic principles of the device. For example, the down converted signals and power signal P (t) can be filtered before subtraction. As shown in FIG. 2, the first and second low pass filters 11, 12 are connected between the quadrature down converter 5 and the first and second subtractors 9, 10. 2 also shows that the power detector 6 outputs a total power signal. Indicates that the sampler 33 can be sampled after amplification by the amplifier 4.
    A second alternative embodiment of this device is shown in FIG. 3. Referring to FIG. 3, a signal received using the antenna 1 and whose band is defined by the antenna bandpass filter 2 is R.F. It is amplified by the amplifier 4. The amplified signal is applied to both quadrature down converter 5 and power detector 6. The signals I, Q down-converted from the quadrature down converter 5 are applied to the signal processing unit 20 together with the power signal P. The signal processing unit 20 combines the power signal P with the down converted signals (I, Q) to compensate for unwanted IP2 distortion results. The signal processing unit 20 may perform filtering, analog-to-digital conversion, and digital signal processing functions, and weighted power signals may be generated internally in the digital signal processing unit 20, for example, digitalization. Can be subtracted numerically from the received I and Q signals.
    The signal processing unit 20 may include an analog-to-digital conversion function for converting the down converted signal (I, Q) and the power signal P into a corresponding sample stream. The signal processing unit 20 may subtract the weight of the power signal P from the down-converted signals I, Q using the I-weighting coefficient and the Q-weighting coefficient to generate the compensation output signal 14. The signal processing unit 20 then continues with the I-weighted and Q-weighted coefficients to cancel the secondary distortion term present in the down-converted signal (I, Q) to optimize the removal of the unwanted signal. I can adjust it. This signal processing unit 20 is used to optimize the control of the output signal 14 by correlating the power signals P with the compensated signals I, Q to determine the remaining unremoved distortion components.
    All such modifications are considered to be within the scope and spirit of the invention as described by the following claims.
    权利要求:
    Claims (32)
    [1" claim-type="Currently amended] In a homodyne radio receiver,
    An antenna for receiving an input signal;
    A bandpass filter connected to the antenna to limit the bandwidth of the input signal to generate a filtered signal;
    An amplifier connected to the filter to amplify the filtered signal to generate an amplified signal;
    A down converter connected to the amplifier for converting the amplified signal into complex baseband signals I and Q;
    A power detector coupled to the amplifier for generating a power signal related to the total received signal power amplified by the amplifier;
    A desired output signal connected to the down converter and the power detector and processing the I, Q signals and the power signal to compensate for corruption caused by secondary intermodulation in the amplifier and the down converter Homodyne wireless receiving device comprising a signal processor for generating a.
    [2" claim-type="Currently amended] According to claim 1,
    And said power detector is a square-law detector.
    [3" claim-type="Currently amended] According to claim 1,
    And the power detector is connected to the amplifier by a directional coupler at the input side of the amplifier.
    [4" claim-type="Currently amended] According to claim 1,
    And the power detector is connected to the amplifier by a directional coupler at the output side of the amplifier.
    [5" claim-type="Currently amended] According to claim 1,
    And the power detector is connected to the amplifier by a signal pick-off unit at the input side of the amplifier.
    [6" claim-type="Currently amended] According to claim 1,
    And the power detector is connected to the amplifier by a signal pick-off unit at the output side of the amplifier.
    [7" claim-type="Currently amended] According to claim 1,
    And the signal processor comprises filters for filtering the I, Q signals and the power signal.
    [8" claim-type="Currently amended] According to claim 1,
    And said signal processor comprises an analog-to-digital converter for converting said I, Q signals and said power signal into corresponding numerical sample streams.
    [9" claim-type="Currently amended] According to claim 1,
    The signal processor generates a compensated I, Q signal by subtracting the weighted signals of the power-related signal from the I, Q signal using the I-weighted coefficient and the Q-weighted coefficient. .
    [10" claim-type="Currently amended] The method of claim 9,
    Wherein the signal processor adjusts the I- and Q-weighting coefficients to eliminate second order distortion terms present in the I and Q signals caused by an unwanted signal. Homodyne wireless receiver.
    [11" claim-type="Currently amended] The method of claim 10,
    And the signal processor adaptively adjusts the I- and Q-weighting coefficients to continuously optimize removal of the second distortion term.
    [12" claim-type="Currently amended] The method of claim 11, wherein
    The signal processor controls optimization by correlating the I, Q signal or the compensated I, Q signal with the power signal to determine a residual unremoved distortion component. Device.
    [13" claim-type="Currently amended] The method of claim 12,
    And the signal processor performs numerical correlation using digitalized sample streams corresponding to the I and Q signals and a power signal.
    [14" claim-type="Currently amended] According to claim 1,
    And the signal processor compensates for the DC offset present at the output of the down converter.
    [15" claim-type="Currently amended] The method of claim 14,
    And the signal processor differentiates and digitizes the I and Q signals to compensate for DC offset.
    [16" claim-type="Currently amended] The method of claim 15,
    And the signal processor further compensates for the DC offset by numerically re-integrating the differentiated and digitized I, Q signals.
    [17" claim-type="Currently amended] According to claim 1,
    And the signal processor compensates for the DC offset by DC blocking and digitizing the I and Q signals.
    [18" claim-type="Currently amended] The method of claim 17,
    And the signal processor further compensates for the DC offset by evaluating an error in a desired I, Q component of the I, Q signal caused by the DC blocking.
    [19" claim-type="Currently amended] The method of claim 18,
    And the signal processor subtracts the estimated error from the I and Q components.
    [20" claim-type="Currently amended] A signal processor for compensating secondary distortion in a homodyne wireless receiver,
    A signal input source configured to receive a real part signal and an imaginary part signal related to an input signal generated by the homodyne receiver;
    An input compensator for generating a power signal related to the total received power of the received signal;
    A weighting processor for generating weighted signals of the power signal; And
    A combiner for combining the weighted signals with the real part signal and the imaginary part signal, respectively, to generate a second distortion-compensated signal in a homodyne receiver
    Signal processor comprising a.
    [21" claim-type="Currently amended] The method of claim 20,
    And the input compensator comprises a square-law detector for generating the power signal.
    [22" claim-type="Currently amended] The method of claim 21,
    And the square law detector is a Gilbert cell.
    [23" claim-type="Currently amended] The method of claim 20,
    And the input compensator comprises a linear detector for generating the power signal.
    [24" claim-type="Currently amended] The method of claim 20,
    And the combiner comprises a squared unit for generating secondary distortion compensated signals.
    [25" claim-type="Currently amended] The method of claim 20,
    And the signal input source comprises an analog-to-digital converter.
    [26" claim-type="Currently amended] The method of claim 20,
    And the input compensator comprises an analog-to-digital converter.
    [27" claim-type="Currently amended] In a homodyne radio receiver,
    A signal receiver for receiving an input signal;
    A down converter converting the input signal into a real part signal and an imaginary part signal based on the input signal;
    A power detector for generating a power signal related to the total received signal power of the input signal; And
    A signal processor that correlates the real part signal and the imaginary part signal with the power signal to generate a signal compensated for a second distortion of a homodyne receiver
    Homodyne wireless receiving device comprising a.
    [28" claim-type="Currently amended] The method of claim 27, wherein the signal receiver,
    antenna;
    A bandwidth filter connected to the antenna to limit the bandwidth of the input signal to generate a filtered signal;
    A directional coupler for applying a portion of the filtered signal to the power detector; And
    An amplifier for amplifying the filtered signal
    Homodyne wireless receiver comprising a.
    [29" claim-type="Currently amended] The method of claim 27,
    And the signal processor generates from the compensated signal first and second weights used to adjust the real part signal and the imaginary part signal.
    [30" claim-type="Currently amended] The method of claim 28,
    And the first and second weights are fed back to a weighting unit to generate the compensated signals.
    [31" claim-type="Currently amended] A method for compensating secondary distortion in a homodyne wireless receiver,
    (a) receiving a real part signal and an imaginary part signal related to an input signal generated by the homodyne receiver;
    (b) generating a power signal related to a total received power of the received signal;
    (c) generating weighted signals of the power signal;
    (d) combining the weighted signals with the real part signal and the imaginary part signal, respectively, to generate a signal compensated for a second distortion of a homodyne receiver;
    Compensation method comprising a.
    [32" claim-type="Currently amended] The method of claim 31, wherein
    And said step (c) adaptively adjusts the real part weight factor and the imaginary part weight factor to continuously optimize the removal of the second distortion, and generates weighted signals of the power signal.
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    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    法律状态:
    1996-07-18|Priority to US8/683,384
    1996-07-18|Priority to US08/683,384
    1996-07-18|Priority to US08/683,384
    1997-07-11|Application filed by 도날드 디. 먼둘, 에릭슨 인크.
    2000-11-25|Publication of KR20000067889A
    2004-10-12|Application granted
    2004-10-12|Publication of KR100452079B1
    优先权:
    申请号 | 申请日 | 专利标题
    US8/683,384|1996-07-18|
    US08/683,384|1996-07-18|
    US08/683,384|US5749051A|1996-07-18|1996-07-18|Compensation for second order intermodulation in a homodyne receiver|
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